View TS4902_64586.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TS4902
300mW at 3.3V SUPPLY AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW
s OPERATING FROM VCC = 2.2V to 5.5V s 0.7W OUTPUT POWER @ Vcc=5V, THD=1%,
f=1kHz, with an 8 load PIN CONNECTIONS (top view)
s 0.3W OUTPUT POWER @ Vcc=3.3V,
THD=1%, f=1kHz, with an 8 load s ULTRA LOW CONSUMPTION IN STANDBY MODE (10nA) s 77dB PSRR @ 217Hz from 5V to 2.2V s ULTRA LOW POP & CLICK s ULTRA LOW DISTORTION (0.1%) s UNITY GAIN STABLE s AVAILABLE IN MiniSO8 & SO8 DESCRIPTION The TS4902 is an audio power amplifier designed to provide the best price to power ratio while preserving high audio quality. Available in MiniSO8 & SO8 package, it is capable of delivering up to 0.7W of continuous RMS ouput power into an 8 load @ 5V.
Standby
TS4902IS-TS4902IST - MiniSO8
Standby Bypass VIN+ VIN-
1 2 3 4
8 7 6 5
VOUT2 GND VCC VOUT1
TS4902ID-TS4902IDT - SO8
1 2 3 4
8 7 6 5
VOUT2 GND VCC VOUT1
TS4902 is also exhibiting an outstanding 0.1% distortion level (THD) from a 5V supply for a Pout of 200mW RMS. An externally controlled standby mode reduces the supply current to less than 10nA. It also includes an internal thermal shutdown protection. The unity-gain stable amplifier can be configured by external gain setting resistors. APPLICATIONS s Mobile Phones (Cellular / Cordless) s PDAs s Portable Audio Devices ORDER CODE
Part Number TS4902IST TS4902ID Temperature Range -40, +85C Package
Bypass VIN+ VIN-
TYPICAL APPLICATION SCHEMATIC
Cfeed Rfeed VCC 6 Audio Input Cin 3 Vin+ + RL 8 Ohms VCC AV = -1 2 1 Bypass Standby Bias GND Cb 7 TS4902 + Vout 2 8 Cs
Rin
4
Vin-
-
V C Vout 1 5
ST *
D *
Rstb
S = MiniSO Package (MiniSO) is only available in Tape & Reel (ST) D = Small Outline Package (SO) - also available in Tape & Reel (DT)
January 2002
1/19
TS4902
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vi Toper Tstg Tj Rthja Supply voltage Input Voltage
2) 1)
Parameter
Value 6 GND to VCC -40 to + 85 -65 to +150 150 175 215 See the power derating curves Fig 20. 2 200 Class A 250
Unit V V C C C C/W
Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature Thermal Resistance Junction to Ambient 3) SO8 MiniSO8 Power Dissipation 4)
Pd
ESD Human Body Model ESD Machine Model Latch-up Latch-up Immunity Lead Temperature (soldering, 10sec)
1. 2. 3. 4. All voltages values are measured with respect to the ground pin. The magnitude of input signal must never exceed VCC + 0.3V / G ND - 0.3V Device is protected in case of over temperature by a thermal shutdown active @ 150C. Exceeding the power derating curves during a long period, will cause abnormal operation.
kV V C
OPERATING CONDITIONS
Symbol VCC VICM VSTB RL Rthja Supply Voltage Common Mode Input Voltage Range Standby Voltage Input : Device ON Device OFF Load Resistor Thermal Resistance Junction to Ambient 1) SO8 MiniSO8 Parameter Value 2.2 to 5.5 GND to VCC - 1.5V 1.5 VSTB VCC GND VSTB 0.5 4 - 32 150 190 Unit V V V C/W
1. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves)
2/19
TS4902
ELECTRICAL CHARACTERISTICS VCC = +5V, GND = 0V, Tamb = 25C (unless otherwise specified)
Symbol ICC ISTANDBY Voo Po THD + N PSRR M GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = GND, RL = 8 Output Offset Voltage No input signal, RL = 8 Output Power THD = 1% Max, f = 1kHz, RL = 8 Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8 Power Supply Rejection Ratio 2) f = 217Hz, RL = 8, RFeed = 22K, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8, CL = 500pF Gain Margin RL = 8, CL = 500pF Gain Bandwidth Product RL = 8 Min. Typ. 6 10 5 0.7 0.15 77 70 20 2 Max. 8 1000 20 Unit mA nA mV W % dB Degrees dB MHz
1. Standby mode is actived when Vstdby is tied to GND 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
VCC = +3.3V, GND = 0V, Tamb = 25C (unless otherwise specified)3)
Symbol ICC ISTANDBY Voo Po THD + N PSRR M GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = GND, RL = 8 Output Offset Voltage No input signal, RL = 8 Output Power THD = 1% Max, f = 1kHz, RL = 8 Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8 Power Supply Rejection Ratio 2) f = 217Hz, RL = 8, RFeed = 22K, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8, CL = 500pF Gain Margin RL = 8, CL = 500pF Gain Bandwidth Product RL = 8 Min. Typ. 5.5 10 5 300 0.15 77 70 20 2 Max. 8 1000 20 Unit mA nA mV mW % dB Degrees dB MHz
1. Standby mode is actived when Vstdby is tied to GND 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz 3. All electrical values are made by correlation between 2.6V and 5V measurements
3/19
TS4902
ELECTRICAL CHARACTERISTICS VCC = 2.6V, GND = 0V, Tamb = 25C (unless otherwise specified)
Symbol ICC ISTANDBY Voo Po THD + N PSRR M GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = GND, RL = 8 Output Offset Voltage No input signal, RL = 8 Output Power THD = 1% Max, f = 1kHz, RL = 8 Total Harmonic Distortion + Noise Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8 Power Supply Rejection Ratio 2) f = 217Hz, RL = 8, RFeed = 22K, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8, CL = 500pF Gain Margin RL = 8, CL = 500pF Gain Bandwidth Product RL = 8 Min. Typ. 5.5 10 5 180 0.15 77 70 20 2 Max. 8 1000 20 Unit mA nA mV mW % dB Degrees dB MHz
1. Standby mode is actived when Vstdby is tied to GND 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
Components Rin Cin Rfeed Cs Cb Cfeed Rstb Gv
Functional Description Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin)) Input coupling capacitor which blocks the DC voltage at the amplifier input terminal Feed back resistor which sets the closed loop gain in conjunction with Rin Supply Bypass capacitor which provides power supply filtering Bypass pin capacitor which provides half supply filtering Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed)) Pull-up resistor which fixes the right supply level on the standby pin Closed loop gain in BTL configuration = 2 x (Rfeed / Rin)
REMARKS 1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100F. 2. The standby response time is about 1s.
4/19
TS4902
Fig. 1 : Open Loop Frequency Response
0 60 Gain Vcc = 5V RL = 8 Tamb = 25C -20 -40 -60
Phase (Deg)
Fig. 2 : Open Loop Frequency Response
0 60 Gain Vcc = 5V ZL = 8 + 560pF Tamb = 25C -20 -40 -60
Phase (Deg)
40
Gain (dB)
40 Phase
Gain (dB)
Phase 20
-80 -100 -120
-80 -100 -120
20
0
-140 -160
0
-140 -160
-20
-180 -200
-20
-180 -200
-40 0.3
1
10
100
Frequency (kHz)
1000
10000
-220
-40 0.3
1
10
100 1000 Frequency (kHz)
10000
-220
Fig. 3 : Open Loop Frequency Response
80 60 40
Gain (dB)
Fig. 4 : Open Loop Frequency Response
80 60 40 Phase 20 0 -20 -40 0.3 Gain Vcc = 3.3V ZL = 8 + 560pF Tamb = 25C 0 -20 -40 -60 -80 -100 -120 -140 -160 -180 -200 -220 1 10 100 1000 Frequency (kHz) 10000 -240
Phase (Deg)
Phase (Deg)
0 Gain Vcc = 33V RL = 8 Tamb = 25C -20 -40 -60 -100 -120 -140 -160 -180 -200 -220 -240
Phase (Deg)
Phase 20 0
-20 -40 0.3
1
10
100 1000 Frequency (kHz)
10000
Fig. 5 : Open Loop Frequency Response
80 60 40
Gain (dB)
Fig. 6 : Open Loop Frequency Response
0 80 Gain 60 40
Phase (Deg)
Gain (dB)
Gain (dB)
-80
0 Vcc = 2.6V ZL = 8 + 560pF Tamb = 25C -20 -40 -60 -80 Phase -100 -120 -140 -160 -180 -200 -220 -240
Gain
Vcc = 2.6V RL = 8 Tamb = 25C
-20 -40 -60 -80 -100 -120 -140 -160 -180 -200 -220 -240
Phase 20 0 -20 -40 0.3
20 0 -20 -40 0.3
1
10
100 1000 Frequency (kHz)
10000
1
10
100 1000 Frequency (kHz)
10000
5/19
TS4902
Fig. 7 : Open Loop Frequency Response
100 80 60 Gain
Gain (dB)
Fig. 8 : Open Loop Frequency Response
-80
100 80 60
Phase (Deg)
-80 Phase -100 -120 -140 -160
Phase (Deg)
Phase
-100 -120 -140 -160 -180
Gain (dB)
Gain 40 20
40 20 0 -20 -40 0.3
-180 0 Vcc = 3.3V CL = 560pF Tamb = 25C 1 10 100 1000 Frequency (kHz) 10000 -200 -220 -240
Vcc = 5V CL = 560pF Tamb = 25C 1 10 100 1000 Frequency (kHz) 10000
-200
-20
-220
-40 0.3
Fig. 9 : Open Loop Frequency Response
100 80 60 Gain
Gain (dB)
-80 Phase -100 -120 -140 -160
Phase (Deg)
40 20 -180 0 -20 -40 0.3 Vcc = 2.6V CL = 560pF Tamb = 25C 1 10 100 1000 Frequency (kHz) 10000 -200 -220 -240
6/19
TS4902
Fig. 10 : Power Supply Rejection Ratio (PSRR) vs Power supply
-30 Vripple = 200mVrms Rfeed = 22k Input = floating RL = 8 Tamb = 25C
Fig. 11 : Power Supply Rejection Ratio (PSRR) vs Feedback Capacitor
-10 -20 -30
PSRR (dB)
-40
PSRR (dB)
-50
-40 -50 -60
-60
Vcc = 5V to 2.2V Cb = 1F & 0.1F
Vcc = 5 to 2.2V Cb = 1F & 0.1F Rfeed = 22k Vripple = 200mVrms Input = floating RL = 8 Tamb = 25C
Cfeed=0 Cfeed=150pF Cfeed=330pF
-70
-70 Cfeed=680pF
-80 10
100
1000 10000 Frequency (Hz)
100000
-80 10
100
1000 10000 Frequency (Hz)
100000
Fig. 12 : Power Supply Rejection Ratio (PSRR) vs Bypass Capacitor
-10 Cb=1F -20 Cb=10F -30
PSRR (dB)
Fig. 13 : Power Supply Rejection Ratio (PSRR) vs Input Capacitor
-10
Vcc = 5 to 2.2V Rfeed = 22k Rin = 22k, Cin = 1F Rg = 100, RL = 8 Tamb = 25C Cb=47F
PSRR (dB)
Cin=1F Cin=330nF -20 Cin=220nF
-40 -50 -60
-30
Vcc = 5 to 2.2V Rfeed = 22k, Rin = 22k Cb = 1F Rg = 100, RL = 8 Tamb = 25C
-40 Cin=100nF -50 Cin=22nF
-70 Cb=100F -80 10 100 1000
Frequency (Hz)
-60 10 100 1000
Frequency (Hz)
10000
100000
10000
100000
Fig. 14 : Power Supply Rejection Ratio (PSRR) vs Feedback Resistor
-10 -20 -30
PSRR (dB)
-40 -50 -60 -70 -80 10
Vcc = 5 to 2.2V Cb = 1F & 0.1F Vripple = 200mVrms Input = floating RL = 8 Tamb = 25C
Rfeed=110k Rfeed=47k
Rfeed=22k Rfeed=10k 100 1000 10000 Frequency (Hz) 100000
7/19
TS4902
Fig. 15 : Pout @ THD + N = 1% vs Supply Voltage vs RL
1.0 8 4
Output power @ 10% THD + N (W) Output power @ 1% THD + N (W)
Fig. 16 : Pout @ THD + N = 10% vs Supply Voltage vs RL
1.2
0.8
Gv = 2 & 10 Cb = 1F F = 1kHz BW < 125kHz Tamb = 25C
1.0 0.8 0.6 0.4 0.2
Gv = 2 & 10 Cb = 1F F = 1kHz BW < 125kHz Tamb = 25C
4 8 16
0.6 16 0.4
0.2 32 0.0 2.5 3.0 3.5
Vcc (V)
32 5.0 0.0 2.5 3.0 3.5
Vcc (V)
4.0
4.5
4.0
4.5
5.0
Fig. 17 : Power Dissipation vs Pout
1.4 1.2 1.0 0.8 0.6 RL=8 0.4 0.2 0.0 0.0 RL=16 Vcc=5V f=1kHz THD+N<1%
Fig. 18 : Power Dissipation vs Pout
0.6 0.5
Power Dissipation (W)
Power Dissipation (W)
RL=4
Vcc=3.3V f=1kHz THD+N<1%
RL=4
0.4 0.3 0.2 0.1 RL=16 0.0 0.0
RL=8
0.2
0.4
0.6
0.8
1.0
0.2
0.4
0.6
Output Power (W)
Output Power (W)
Fig. 19 : Power Dissipation vs Pout
0.40 0.35
Power Dissipation (W)
Fig. 20 : Power Derating Curves
RL=4
Power Dissipation (W)
0.30 0.25 0.20 0.15
Vcc=2.6V f=1kHz THD+N<1%
1.2 1.0 0.8 0.6 0.4 MiniSO8 0.2 RL=16 0.0 0.1 0.2 0.3
Output Power (W)
SO8 on demoboard MiniSO8 on demoboard
RL=8 0.10 0.05 0.00 0.0
SO8
0
25
50
75
100
125
150
Ambiant Temperature (C)
8/19
TS4902
Fig. 21 : Output Power vs Load Resistance
1.0 THD+N=1% Gv = 2 & 10 Cb = 1F F = 1kHz BW < 125kHz Tamb = 25C
Vcc=4.5V Vcc=4V
Fig. 22 : Output Power vs Load Resistance
1.2 1.0
Output Power (W)
0.8
Output power (W)
Vcc=5V
Vcc=5V
0.6
0.8
Vcc=4.5V
THD+N=10% Gv = 2 & 10 Cb = 1F F = 1kHz BW < 125kHz Tamb = 25C
0.6
Vcc=4V
0.4
0.4
0.2
Vcc=3.5V Vcc=3V Vcc=2.5V
0.2
Vcc=3.5V Vcc=3V
0.0
0.0
24 32
Vcc=2.5V
8
16
8
16
Load Resistance (ohm)
24
32
Load Resistance (ohm)
Fig. 23 : Clipping Voltage vs Supply Voltage
1.0 Tamb = 25C 0.9
Dropout Voltage (V)
Fig. 24 : Frequency response vs Cin & Cfeed
10 5
0.8 0.7 0.6 0.5 0.4 0.3 0.2 2.5 3.0 3.5 8 Low Side 4 Low Side
4 High Side
Gain (dB)
0 -5 -10 -15 -20 -25 10
Cfeed = 330pF Cfeed = 680pF Cin = 470nF Cin = 22nF Cin = 82nF Rin = Rfeed = 22k Tamb = 25C 10000 Cfeed = 2.2nF
8 High Side
4.0
4.5
5.0
Supply Voltage (V)
100 1000 Frequency (Hz)
Fig. 25 : Noise Floor
100 Vcc = 2.5V to 5V Rin = Rfeed = 22k Cb = Cin = 1F Input Grounded BW < 22kHz Tamb = 25C
Output Noise Voltage ( V)
80
60
40
VOUT1 + VOUT2
Standby = ON
20
0 20
100
1000 Frequency (Hz)
10000
9/19
TS4902
Fig. 26 : THD + N vs Output Power
10 Rl = 4 Vcc = 5V Gv = 2 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1 20kHz
Fig. 27 : THD + N vs Output Power
10 RL = 4, Vcc = 5V Gv = 10 Cb = Cin = 1F BW < 125kHz, Tamb = 25C
THD + N (%)
THD + N (%)
20kHz 1 20Hz
20Hz, 1kHz 0.1 1E-3 0.01 0.1 Output Power (W) 1 0.1 1E-3 0.01 0.1 Output Power (W)
1kHz 1
Fig. 28 : THD + N vs Output Power
10 RL = 4, Vcc = 3.3V Gv = 2 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1
Fig. 29 : THD + N vs Output Power
10 RL = 4, Vcc = 3.3V Gv = 10 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1 20kHz
THD + N (%)
20kHz
THD + N (%)
0.1 20Hz, 1kHz 0.1 1E-3 0.01 0.1 Output Power (W) 1 1E-3
20Hz 1kHz 0.01 0.1 Output Power (W) 1
Fig. 30 : THD + N vs Output Power
10 RL = 4, Vcc = 2.6V Gv = 2 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1
Fig. 31 : THD + N vs Output Power
10 RL = 4, Vcc = 2.6V Gv = 10 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1 20kHz
THD + N (%)
20kHz 0.1 20Hz, 1kHz 0.1 1E-3 0.01 Output Power (W) 0.1 1E-3 0.01 Output Power (W)
THD + N (%)
20Hz 1kHz 0.1
10/19
TS4902
Fig. 32 : THD + N vs Output Power
10 RL = 8 Vcc = 5V Gv = 2 Cb = Cin = 1F BW < 125kHz 1 Tamb = 25C
Fig. 33 : THD + N vs Output Power
10 RL = 8 Vcc = 5V Gv = 10 Cb = Cin = 1F BW < 125kHz Tamb = 25C 20Hz 20kHz
THD + N (%)
THD + N (%)
1
20Hz, 1kHz
20kHz
0.1
0.1 1kHz
1E-3
0.01 0.1 Output Power (W)
1
1E-3
0.01 0.1 Output Power (W)
1
Fig. 34 : THD + N vs Output Power
10 RL = 8, Vcc = 3.3V Gv = 2 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1
Fig. 35 : THD + N vs Output Power
10 RL = 8, Vcc = 3.3V Gv = 10 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1 20Hz 20kHz
THD + N (%)
20Hz, 1kHz 0.1
20kHz
THD + N (%)
0.1 1kHz
1E-3
0.01 0.1 Output Power (W)
1
1E-3
0.01 0.1 Output Power (W)
1
Fig. 36 : THD + N vs Output Power
10 RL = 8, Vcc = 2.6V Gv = 2 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1
Fig. 37 : THD + N vs Output Power
10 RL = 8, Vcc = 2.6V Gv = 10 Cb = Cin = 1F BW < 125kHz Tamb = 25C 1 20Hz 20kHz
THD + N (%)
20Hz, 1kHz
20kHz 1kHz
0.1
1E-3
0.01 Output Power (W)
0.1
THD + N (%)
0.1
1E-3
0.01 Output Power (W)
0.1
11/19
TS4902
Fig. 38 : THD + N vs Output Power
10 RL = 16, Vcc = 5V Gv = 2 Cb = Cin = 1F BW < 125kHz Tamb = 25C
Fig. 39 : THD + N vs Output Power
10 RL = 16, Vcc = 5V Gv = 10 Cb = Cin = 1F BW < 125kHz Tamb = 25C 20kHz 0.1
THD + N (%)
20kHz 0.1
THD + N (%)
1
1
20Hz, 1kHz 0.01 1E-3 0.01 0.1 Output Power (W) 1
1kHz 0.01 1E-3
20Hz 1
0.01 0.1 Output Power (W)
Fig. 40 : THD + N vs Output Power
10 RL = 16, Vcc = 3.3V Gv = 2 Cb = Cin = 1F BW < 125kHz Tamb = 25C
Fig. 41 : THD + N vs Output Power
10 RL = 16 Vcc = 3.3V Gv = 10 Cb = Cin = 1F BW < 125kHz Tamb = 25C 20kHz 0.1
THD + N (%)
20kHz 0.1
THD + N (%)
1
1
1kHz 20Hz, 1kHz 0.01 1E-3 0.01 Output Power (W) 0.1 0.01 1E-3
20Hz 0.01 Output Power (W) 0.1
Fig. 42 : THD + N vs Output Power
10 RL = 16 Vcc = 2.6V Gv = 2 Cb = Cin = 1F BW < 125kHz Tamb = 25C 20kHz 0.1
Fig. 43 : THD + N vs Output Power
10 RL = 16 Vcc = 2.6V Gv = 10 Cb = Cin = 1F BW < 125kHz Tamb = 25C 20Hz 20kHz
THD + N (%)
THD + N (%)
1
1
0.1
20Hz, 1kHz 0.01 1E-3 0.01 Output Power (W) 0.1 0.01 1E-3
1kHz 0.01 Output Power (W) 0.1
12/19
TS4902
Fig. 44 : Signal to Noise Ratio vs Power Supply with Unweighted Filter (20Hz to 20kHz)
100
Fig. 45 : Signal to Noise Ratio Vs Power Supply with Unweighted Filter (20Hz to 20kHz)
90
90
80
RL=16
SNR (dB)
RL=8
RL=4
SNR (dB)
80
RL=8 70 RL=16 RL=4
70 Gv = 2 Cb = Cin = 1F THD+N < 0.4% Tamb = 25C 3.0 3.5
Vcc (V)
60
60
50 2.5
Gv = 10 Cb = Cin = 1F THD+N < 0.7% Tamb = 25C 3.0 3.5
Vcc (V)
4.0
4.5
5.0
50 2.5
4.0
4.5
5.0
Fig. 46 : Signal to Noise Ratio vs Power Supply with Weighted Filter type A
110
Fig. 47 : Signal to Noise Ratio vs Power Supply with Weighted Filter Type A
90
100
80
RL=16
SNR (dB)
RL=8
RL=4
SNR (dB)
90
RL=8 70 RL=16 RL=4
80 Gv = 2 Cb = Cin = 1F THD+N < 0.4% Tamb = 25C 3.0 3.5
Vcc (V)
70
60
60 2.5
Gv = 10 Cb = Cin = 1F THD+N < 0.7% Tamb = 25C 3.0 3.5
Vcc (V)
4.0
4.5
5.0
50 2.5
4.0
4.5
5.0
Fig. 48 : Current Consumption vs Power Supply Voltage
7 6 5
Icc (mA)
Fig. 49 : Current Consumption vs Standby Voltage @ Vcc = 5V
7
Vstandby = Vcc Tamb = 25C
6 5
Icc (mA)
4 3 2 1 0
4 3 2 1 0 0.0 Vcc = 5V Tamb = 25C 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Vstandby (V) 4.0 4.5 5.0
0
1
2
Vcc (V)
3
4
5
13/19
TS4902
Fig. 50 : Current Consumption vs Standby Voltage @ Vcc = 3.3V
6 5 4
Fig. 51 : Current Consumption vs Standby Voltage @ Vcc = 2.6V
6 5 4
Icc (mA)
Icc (mA)
3 2 1 0 0.0
3 2 1 0 0.0
Vcc = 3.3V Tamb = 25C 0.5 1.0 1.5 2.0 Vstandby (V) 2.5 3.0
Vcc = 2.6V Tamb = 25C 0.5 1.0 1.5 Vstandby (V) 2.0 2.5
14/19
TS4902 s BTL Configuration Principle
The TS4902 is a monolithic power amplifier with a BTL (Bridge Tied Load) output configuration. BTL means that each end of the load is connected to two single ended output amplifiers. Thus, we have: Single ended output 1 = Vout1 = Vout (V) Single ended output 2 = Vout2 = -Vout (V) And Vout1 - Vout2 = 2Vout (V) The output power is :
Pout = ( 2 Vout RMS ) 2 (W ) RL
In high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in parallel with Rfeed. Its form a low pass filter with a -3dB cut off frequency 1 FCH = ---------------------------------------------- ( Hz ) 2 Rfe ed Cfeed
s Power dissipation and efficiency
Hypothesis : * Voltage and current in the load are sinusoidal (Vout and Iout) * Supply voltage is a pure DC source (Vcc) Regarding the load we have : VOUT = V PEAK sin t (V) and VOUT IOUT = ---------------- (A) RL and VPEAK 2 POUT = ---------------------- (W) 2 RL Then, the average current delivered by the supply voltage is: ICC
AVG
For the same power supply voltage, the output power in BTL configuration is four times higher than the output power in single ended configuration.
s Gain In Typical Application Schematic
(cf. page 1) In flat region (no effect of Cin), the output voltage of the first stage is : R fe ed Vout1 = - Vin ------------------- (V) Rin For the second stage : Vout2 = -Vout1 (V) The differential output voltage is Rfee d Vout2 - Vo ut1 = 2Vin ------------------- (V) Rin The differential gain named gain (Gv) for more convenient usage is : Vout2 - Vou t1 Rfee d G v = -------------------------------------- = 2 ------------------Vin Rin Remark : Vout2 is in phase with Vin and Vout1 is 180 phased with Vin. It means that the positive terminal of the loudspeaker should be connected to Vout2 and the negative to Vout1.
VPEAK = 2 ------------------- (A) RL
The power delivered by the supply voltage is Psupply = Vcc IccAVG (W) Then, the power dissipated by the amplifier is Pdiss = Psupply - Pout (W) 2 2 Vcc Pdi ss = ---------------------- POUT - POUT (W) RL and the maximum value is obtained when Pdiss --------------------- = 0 POUT and its value is:
s Low and high frequency response
In low frequency region, the effect of Cin starts. Cin with Rin forms a high pass filter with a -3dB cut off frequency 1 FCL = ------------------------------- ( Hz ) 2 R in Cin
Pdiss max =
2 Vcc 2 2RL
(W)
Remark : This maximum value is only depending on power supply voltage and load values.
15/19
TS4902
The efficiency is the ratio between the output power and the power supply POUT VPEAK = ----------------------- = ---------------------Psup ply 4VCC The maximum theoretical value is reached when Vpeak = Vcc, so ---- = 78.5% 4 Moreover, Cb determines the speed that the amplifier turns ON. The slower the speed is, the softer the turn ON noise is. The charge time of Cb is directly proportional to the internal generator resistance 50k. Then, the charge time constant for Cb is b = 50kxCb (s) As Cb is directly connected to the non-inverting input (pin 2 & 3) and if we want to minimize, in amplitude and duration, the output spike on Vout1 (pin 5), Cin must be charged faster than Cb. The charge time constant of Cin is in = (Rin+Rfeed)xCin (s) Thus we have the relation in << b (s) The respect of this relation permits to minimize the pop and click noise.
s Decoupling of the circuit
Two capacitors are needed to bypass properly the TS4902, a power supply bypass capacitor Cs and a bias voltage bypass capacitor Cb. Cs has especially an influence on the THD+N in high frequency (above 7kHz) and indirectly on the power supply disturbances. With 100F, you can expect similar THD+N performances like shown in the datasheet. If Cs is lower than 100F, in high frequency increases, THD+N and disturbances on the power supply rail are less filtered. To the contrary, if Cs is higher than 100F, those disturbances on the power supply rail are more filtered. Cb has an influence on THD+N in lower frequency, but its function is critical on the final result of PSRR with input grounded in lower frequency. If Cb is lower than 1F, THD+N increase in lower frequency (see THD+N vs frequency curves) and the PSRR worsens up If Cb is higher than 1F, the benefit on THD+N in lower frequency is small but the benefit on PSRR is substantial (see PSRR vs. Cb curve : fig.12). Note that Cin has a non-negligible effect on PSRR in lower frequency. Lower is its value, higher is the PSRR (see fig. 13).
Remark : Minimize Cin and Cb has a benefit on pop and click phenomena but also on cost and size of the application. Example : your target for the -3dB cut off frequency is 100 Hz. With Rin=Rfeed=22 k, Cin=72nF (in fact 82nF or 100nF). With Cb=1F, if you choose the one of the latest two values of Cin, the pop and click phenomena at power supply ON or standby function ON/OFF will be very small 50 kx1F >> 44kx100nF (50ms >> 4.4ms). Increasing Cin value increases the pop and click phenomena to an unpleasant sound at power supply ON and standby function ON/OFF. Why Cs is not important in pop and click consideration ?
Hypothesis : * Cs = 100F * Supply voltage = 5V * Supply voltage internal resistor = 0.1 * Supply current of the amplifier Icc = 6mA At power ON of the supply, the supply capacitor is charged through the internal power supply resistor. So, to reach 5V you need about five to ten times the charging time constant of Cs (s = 0.1xCs (s)). Then, this time equal 50s to 100s << b in the majority of application.
s Pop and Click performance
Pop and Click performance is intimately linked with the size of the input capacitor Cin and the bias voltage bypass capacitor Cb. Size of Cin is due to the lower cut-off frequency and PSRR value requested. Size of Cb is due to THD+N and PSRR requested always in lower frequency.
16/19
TS4902
At power OFF of the supply, Cs is discharged by a constant current Icc. The discharge time from 5V to 0V of Cs is 5Cs tDischCs = ------------- = 83 ms Icc Now, we must consider the discharge time of Cb. At power OFF or standby ON, Cb is discharged by a 100k resistor. So the discharge time is about b Disch 3xCbx100k (s). In the majority of application, Cb=1F, then bDisch300ms >> tdischCs.
s Remark on PSRR measurement conditions
What is the PSRR ?
The PSRR is the Power Supply Rejection Ratio. It's a kind of SVR in a determined frequency range. The PSRR of a device is the ratio between the power supply disturbance and the result on the output. We can say that the PSRR is the ability of a device to minimize the impact of power supply disturbances to the output.
s How to use the PSRR curves (page 7)
We have finished a design and we have chosen the components values : * Rin=Rfeed=22k, Cin=100nF, Cb=1F Now, on fig. 13, we can see the PSRR (input grounded) vs frequency curves. At 217Hz we have a PSRR value of -36dB. In fact, we want a value of about -70dB. So, we need a gain of +34dB ! Now, on fig. 12 we can see the effect of Cb on the PSRR (input grounded) vs. frequency. With Cb=100F, we can reach the -70dB value. The process to obtain the final curve (Cb=100F, Cin=100nF, Rin=Rfeed=22k) is a simple transfer point by point on each frequency of the curve on fig. 13 to the curve on fig. 12. The measurement result is shown on figure A. Fig. A : PSRR changes with Cb
How do we measure the PSRR ?
Fig. B : PSRR measurement schematic
Rfeed Vripple Vcc 4 Rin Cin Av=-1 + 8 Vs+ 3 VinVin+ + RL Vout2 6
Vcc
Vout1 5
Vs-
2 Rg 100 Ohms 1
Bypass Standby Bias
GND
TS4902
Cb
7
s Measurement process:
* Fix the DC voltage supply (Vcc)
-30 Cin=100nF Cb=1F
-40
PSRR (dB)
Vcc = 5, 3.3 & 2.6V Rfeed = 22k, Rin = 22k Rg = 100, RL = 8 Tamb = 25C
* Fix the AC sinusoidal ripple voltage (Vripple) * No bypass capacitor Cs is used The PSRR value for each frequency is :
-50 Cin=100nF Cb=100F
PSRR ( d B ) = 20 x Log 10
-60
R ms ( Vrippl e ) -------------------------------------------Rms ( Vs + - Vs - )
-70 10 100 1000
Frequency (Hz)
Remark : The measurement of the RMS voltage is
10000 100000
not a selective RMS measurement but a full range (2 Hz to 125 kHz) RMS measurement. This means we have: the effective RMS signal + the noise.
17/19
TS4902
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO)
L c1
a2
A
C
a3
Inches Typ.
s e3 E
D M
8
5
1
4
Millimeters Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.) 0.150 0.016 Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 0.189 0.228 Min. 0.004 0.026 0.014 0.007 0.010
F
a1
b
b1
Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244
0.050 0.150 0.157 0.050 0.024
18/19
TS4902
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (miniSO)
k
c
0,25mm .010inch GAGEPLANE
L
E1
SEATING PLANE
A A2 A1
5
C
E
4
D
L1 b
C
8
1
Dim. Min. A A1 A2 b c D E E1 e L L1 k ccc 0.050 0.780 0.250 0.130 2.900 4.750 2.900 0.400 0d
Millimeters Typ. 0.100 0.860 0.330 0.180 3.000 4.900 3.000 0.650 0.550 0.950 3d Max. 1.100 0.150 0.940 0.400 0.230 3.100 5.050 3.100 0.700 6d 0.100 Min. 0.002 0.031 0.010 0.005 0.114 0.187 0.114 0.016 0d
ccc
PIN1IDENTIFICA TION
e
Inches Typ. 0.004 0.034 0.013 0.007 0.118 0.193 0.118 0.026 0.022 0.037 3d Max. 0.043 0.006 0.037 0.016 0.009 0.122 0.199 0.122 0.028 6d 0.004
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States (c) http://www.st.com
19/19

▲Up To Search▲

Price & Availability of TS4902

	To Download TS4902 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .